SIEMENS PLC INTRODUCTION
In Siemens series two series are available
• s5 Series (OS-DOS)
57 Series (Os - Windows y
CLASSIFICATION Siemens S7 PLC is classified on the basis of
S7-1200
S7- 1500
S7-200
Medium End
S7- 300
High End
S7-400
C7
M7
D DO
256
256
256
4096
10.000
20,000
fobbits
IN S7 LOW END PLC'S THERE ARE TWO SERIES
1200 series
1210
• 12120
12140
1215C
The SIMATIC S7-1200 Family Contains
Compact controller with graded performance in different versions us wide Fange AC or DC centrollen.
Sigrul bes Analog Digital for low cost medular controller expansion dinctly in the CPI with the retention of the mounting poo
Different digital and Analog signal modules. Theme witch with 4 poets kar implementing of many different network
rupaiya | lurped contact laito locate
• Fasily acveible connection and control elements peotacted by funt flaps • Movable connection terminals, al for Analog or digital expansion nodules
Weits
PROFINET Interface
The integral PROFINET interface purni communication with
+ Pgrming devi
* IMI den * Over SIMATIC controllers
PROPOSITIO matic a
The followine protect e
10- TOT
w
fleits
PC to PLC Communication
Advantage of S7-1200 is that
The dee eTernA P a ate Ahmetin niel i pleg dan elliott i a
VI
vit
+ si n he iti
leits
Communication Software (TIA)
Meits
DATA TYPES
Data
Input
Output
Memory
Types
1.
M
In TIA
Only IEC Timer and Counters are available. They are software bäsed timers which coul internal clock of the CPU.
beits
Data Types Syntax
F REgret Adding
Timo me. MONTE
Tag MWTA W
Te eid Lending
12170
1500 series
1511
1513
• 1515
• 1516
1517 1518
Data Types Syntax
For Ba Level Addressing Type Hye Naa
Tampere, MS
Type y No
Trample . Qh, s?
For Werd Lever Adding Type WWied No
Example: MW7, Qw4, waste
For Tatihie Ward Lel Addreing
Typer DEad No
Example this. M2.005.
Greits
Memory
WORD
MWO
MW2
MW4
MW
Bit
M0.1
M10.7
MIO
M.
MI.
Byte
мво
MBI
MB2
MB3
DOUBLEWORD
MDO
MD4
MDS
MD12
veits
Memory
WORD
MW
MW
MW
MW6
MW
MOI
MLO
M1.7
MBI
MB2
MRS
MB4
DOUBLEWORD
MD4
MDN
MD12
MD2
MI)
Similarly MDO Containe MBO M2 ta That MBO MBI MB2 MB3
MSW LAW
MSD
LSB
ln this must significant bit in M10.7 and the least significant bit is MLO
This addressing soquence in important since the same addressing sequence is followed in Input and Output addrossing's
